E-Series GPU IP Architecture Debuted in 2025
The design enables concurrent AI and graphics acceleration on a single programmable software stack.
Updated on Sept. 30, 2026 in Semiconductors
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Announced in 2025, the E-Series GPU IP integrates graphics, compute, and AI acceleration into a unified hardware architecture. This research-stage platform is designed to offload dedicated AI processors during peak usage.
Why it matters
The E-Series architecture enables edge system optimization by consolidating disparate workloads onto a single stack, significantly improving power efficiency. It provides four times the raw compute performance compared to the company's previous D-Series generation.
The E-Series GPU IP delivers 32 TOPS Int8 performance per core at 1GHz. This represents a four-fold increase in raw compute throughput compared to the architecture of the previous D-Series.
The players
E-Series GPU IP
A nascent graphics and AI compute architecture designed to consolidate workloads on edge devices.
D-Series
The previous generation of GPU hardware that serves as the performance baseline for the E-Series.
The details
The E-Series functions as a co-processor that offloads AI tasks from dedicated processors during peak periods by utilizing a unified software stack. This architecture supports the concurrent execution of graphics and compute workloads, allowing for more efficient resource allocation at the edge. The design replaces the need for separate hardware components by integrating these functions into a single programmable architecture.
Timeline
The E-Series GPU IP was announced in 2025.
First silicon for the E-Series is expected by the end of 2026.
The Tech Race
The E-Series architecture follows a pattern set by the D-Series, positioning the firm to compete in the expanding market for edge AI silicon. This development signals a broader transition toward consolidating dedicated graphics and AI processing tasks into single, high-efficiency stacks.
The E-Series is currently a research-stage architecture rather than a commercially available product. Once it reaches production, it will primarily benefit hardware designers building edge systems that require simultaneous graphics rendering and AI inference capabilities.
The takeaway
The E-Series architecture aims to redefine edge efficiency through converged AI and graphics acceleration. Stakeholders should monitor the production timeline, as the performance gains depend entirely on the successful delivery of first silicon expected by the end of 2026.
What happens next
The arrival of first silicon, currently projected for the end of 2026, will be the next major milestone to verify the 32 TOPS Int8 performance target.
Further reading
For more on the latest developments in chip design, visit Semiconductors.
Source note: This article includes information reported by Semiconductor Engineering.
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