Giesecke + Deverient Joined CIRES Research Consortium

The firm joined a three-year European initiative focused on developing secure, resilient edge computing protocols.

Updated on Oct. 2, 2026 in Semiconductors

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Giesecke + Deverient has joined the CIRES research consortium, a three-year European effort aimed at establishing resilient security protocols for edge computing architectures. AI Illustration. Upload story photo >

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Giesecke + Deverient has joined the Critical Infrastructure Resilience through Edge Computing Systems (CIRES) research consortium. The project is an EU-funded initiative research-stage effort to establish security protocols for network edge workloads.

Why it matters

As edge computing architectures proliferate, establishing standardized, resilient security protocols is essential for protecting critical infrastructure. This research consortium aims to catalyze end-to-end technology standards over a three-year development period.

The CIRES project operates with a total budget of EUR 12.81 million, supported by EUR 4.15 million from the European Union. This three-year research effort focuses on hardening computing workloads that occur at the edge of networks.

The players

Giesecke + Deverient

A global security technology company that specializes in secure digital payments, connectivity, and identity solutions.

Chips Joint Undertaking

An EU-funded public-private partnership focused on advancing semiconductor technology and computing research.

The details

The consortium researches security protocols designed to protect computing workloads performed at the edge—data processing occurring physically near the source of data rather than in centralized data centers. By focusing on these distributed environments, researchers intend to build systems that remain resilient even when individual network segments are compromised. The initiative falls under the Chips Joint Undertaking, a collaborative framework designed to boost semiconductor and computing research capacity across the European Union.

Timeline

  1. October 2026: Giesecke + Deverient announced its participation in the consortium.

  2. August 2029: The research project reaches its scheduled completion date.

The Tech Race

This project follows the collaborative research model established by the Chips Joint Undertaking to advance secure, resilient computing architectures. It represents a targeted effort to bridge the security gap between centralized cloud infrastructure and distributed edge deployments.

While the outcomes of this research remain in the development phase, the resulting protocols will eventually influence how hardware manufacturers and service providers secure critical infrastructure. The project is expected to conclude in August 2029, at which point findings may inform future industrial standards.

The takeaway

The CIRES project signifies an industry shift toward embedding security at the hardware and edge-software level rather than relying on perimeter defenses. Interested observers should monitor the project's output as it nears its August 2029 conclusion for potential adoption by European critical infrastructure providers.

Further reading

Explore more analysis of the current landscape for high-performance computing in our Semiconductors section.

Source note: This article includes information reported by Telecompaper.

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