Hamamatsu Photonics Released Failure Analysis Microscope
The new system streamlines testing for complex 3D and AI chiplets to reduce analysis times.
Updated on Oct. 7, 2026 in Semiconductors
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Hamamatsu Photonics has released the iPHEMOS-DDX, an inverted emission microscope designed for the failure analysis of semiconductor packages. The platform is built to handle the increasing complexity of AI chiplets, HBM, and 3D-stacked architectures.
Why it matters
As generative AI drives the development of increasingly dense and complex chip structures, traditional inspection methods struggle to pinpoint defects efficiently. This platform aims to accelerate the failure analysis workflow required to maintain high production yields for next-generation hardware.
The iPHEMOS-DDX integrates seven diagnostic techniques, including PEM, Thermal/LIT, LSM, OBIRCH, DALS, EOP/EOFM, and TD Imaging. The system supports direct docking to testers from three directions for flexible integration into existing measurement environments.
The players
Hamamatsu Photonics
A manufacturer specializing in optoelectronic components, sensors, and imaging systems for research and industrial failure analysis.
The details
The device acts as an all-in-one suite for finding defects in semiconductor packages—housings that protect and connect silicon dies. By combining techniques like PEM (photon emission microscopy for detecting light emitted by failing circuits) and OBIRCH (optical beam induced resistance change to locate shorts), the machine identifies structural failures without moving the sample between systems. This design simplifies analysis for 2.5D and 3D packages where multiple silicon layers make identifying specific fault coordinates difficult.
Timeline
October 6, 2026: Hamamatsu Photonics announced the product release.
The Tech Race
As high-bandwidth memory and 3D-stacked architectures become the standard for AI compute, semiconductor firms are shifting toward multi-modal analysis platforms. The iPHEMOS-DDX represents a competitive effort to consolidate testing workflows that previously required separate, time-consuming diagnostic steps.
This platform is intended for use by semiconductor engineers and failure analysis labs overseeing the production of AI-focused hardware. Manufacturers adopting the system may see reduced turnaround times when debugging advanced chiplet designs, though immediate availability and pricing details were not disclosed.
The takeaway
The move toward vertical integration in chip design creates a critical need for unified testing platforms that can diagnose 3D-stacked components. Monitor future white papers from testing labs to see if the iPHEMOS-DDX platform successfully correlates its seven diagnostic outputs into faster fault-localization metrics.
Further reading
For more on the current manufacturing landscape, see our latest coverage on Semiconductors.
Source note: This article includes information reported by DQ.
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