Researcher Designed Crypto SoC Using Meta Muse AI
The $2,000 chip design process demonstrates how AI agents can automate semiconductor tape-out workflows.
Updated on Oct. 14, 2026 in Semiconductors
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A researcher has successfully designed a crypto-specific system-on-a-chip (SoC) using Meta's Muse AI agent. The project, which leveraged RISC-V architecture, marks an advancement in using large language models for hardware development.
Why it matters
Automating chip design lowers development barriers for specialized hardware like blockchain-native processors. The approach aims to drastically reduce costs and time-to-market for bespoke silicon architectures.
The design utilized 100 million tokens processed through Meta's Muse AI and verified against 1.5 million Berkeley TestFloat vectors. This performance confirms compliance with official ACT suites, though the expert intends to replace the current third-party baseline core.
The players
Meta
A multinational technology conglomerate focused on AI research, social media platforms, and metaverse-enabling hardware.
NVIDIA
A designer and manufacturer of graphics processing units and AI-optimized computing architectures.
Anthropic
An AI safety and research company known for developing the Claude series of large language models.
The details
Meta's Muse AI agent automated the design, testing, and manufacturing-prep software processes. The researcher is preparing for multi-Project Wafer (MPW) runs — a manufacturing technique where multiple chip designs are placed on a single silicon wafer to split production costs. Future iterations will include custom vector instructions to optimize performance for the Thru blockchain.
Timeline
October 14, 2026: The research results regarding the RISC-V SoC design were published.
The Tech Race
This effort follows the launch of the Build-A-Chip-Bench by NVIDIA and ChipAgents, which creates a standard for evaluating AI's hardware engineering proficiency. The field is currently transitioning from basic design assistance to fully automated tape-out capabilities.
This development suggests that specialized, low-cost silicon could become accessible to small teams or individual developers. Users can expect to see more domain-specific chips hitting the market if AI-driven tape-out workflows continue to scale.
The takeaway
The successful use of AI to pass official design suites highlights a shift toward democratized hardware engineering. Watch for the results of the upcoming multi-Project Wafer runs as the primary validation of the AI-generated design's physical functionality.
What happens next
The researcher plans to initiate multi-Project Wafer runs to move the design into physical production.
Further reading
For more on how new architectures are reshaping the industry, visit Semiconductors.
Source note: This article includes information reported by Wccftech.
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