Developer Compiles Functional CPU Into AI Model Weights
The configuration allows an AI to perform deterministic math by executing instructions through its transformer layers.
Updated on Oct. 28, 2026 in Artificial Intelligence
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Developer divagr18 has successfully embedded a fully functional 32-bit RISC-V CPU directly into the weights of the Qwen3.5-4B language model. This research-stage configuration allows the model to perform deterministic arithmetic rather than relying on probabilistic text generation.
Why it matters
By compiling logic gates into transformer weights, this approach bypasses the inherent inaccuracy of LLMs when performing complex math. It bridges the gap between deterministic computing and probabilistic AI, potentially offering a path to models that can handle precise numerical tasks reliably.
The Qwenputer setup achieves 3,200 trace tokens per second on an Nvidia L4 GPU by adding 11 transformer layers to the base 4B parameter model. It successfully passes the official riscv-tests compliance suite, confirming the integrity of its RV32IM architecture.
The players
divagr18
An independent developer who authored the Qwenputer implementation on GitHub.
Qwen3.5-4B
A dense language model architecture used as the base substrate for the CPU compilation.
The details
The system works by using a compiler to set the weights of 11 additional Gated DeltaNet transformer layers—a specialized recurrent architecture—to act as the CPU's instruction decoder and logic gates. During the model's forward pass, these layers perform bitwise operations, effectively executing RISC-V instructions in real time. The Gated DeltaNet layers are repurposed as system RAM, allowing the model to run MicroPython code without modifying the standard Python runtime.
Timeline
- 2026-10-28
Project details published.
The Tech Race
Most current research focuses on improving LLM arithmetic through chain-of-thought prompting or fine-tuning, which remain prone to hallucination. This project instead treats the transformer architecture as a programmable computer, moving toward deterministic hardware-in-the-model designs.
This development is currently a research proof-of-concept hosted on GitHub, meaning it is not yet a product for standard enterprise workflows. It demonstrates that future AI platforms could integrate deterministic sub-modules to handle precise calculations alongside standard inference.
The takeaway
This experiment proves that transformer weights can function as a complete, compliant instruction set architecture. Developers should watch for future integrations where these deterministic CPU layers are paired with larger parameter models to replace external tool-calling for math tasks.
Further reading
For broader trends in model architecture and reasoning, see our latest coverage on Artificial Intelligence.
Source note: This article includes information reported by Startup Fortune.
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