AI Semiconductor Workshop to Convene Sunday in Athens

The eighth annual research workshop will explore new design methodologies for AI-focused hardware and memory systems.

Updated on Oct. 30, 2026 in Semiconductors

Isometric editorial illustration of a silicon wafer with intricate geometric circuitry patterns, representing AI hardware research.
The Eighth International Workshop on Domain Specific System Architecture convenes Sunday in Athens to discuss advancements in AI-focused semiconductor design. AI Illustration. Upload story photo >

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The Eighth International Workshop on Domain Specific System Architecture is scheduled to take place this Sunday in Athens, Greece. The event is hosted as part of the 59th IEEE/ACM International Symposium on Microarchitecture, which runs from Saturday to Wednesday.

Why it matters

This workshop provides a forum for researchers to exchange advances in AI-focused hardware design. It serves to accelerate international collaboration on methodologies for memory and programming environments for AI semiconductors.

The symposium covers systematic design methodologies and memory technologies for AI semiconductors, marking the eighth iteration of this specific domain-focused research forum. The event spans five days, with the workshop sessions occurring on Sunday.

The players

IEEE/ACM International Symposium on Microarchitecture

A long-standing academic forum focused on processor design, architecture, and microarchitecture research.

Nvidia

A designer and manufacturer of graphics processing units and specialized AI semiconductor hardware.

FuriosaAI

A startup focused on designing high-efficiency AI inference chips for data centers.

MIT

A research university with significant output in computer architecture and silicon engineering.

The details

The workshop facilitates research sharing through technical paper sessions and invited talks from global institutions. Presentations focus on domain-specific system architecture, which optimizes specialized hardware for particular software tasks, and the programming environments required to manage memory bottlenecks in AI-accelerated workloads.

Timeline

  1. Saturday: The IEEE/ACM International Symposium on Microarchitecture begins.

  2. Sunday: The Eighth International Workshop on Domain Specific System Architecture occurs.

  3. Wednesday: The symposium concludes.

The Tech Race

The workshop reflects the ongoing industry shift toward specialized AI silicon, following the precedent of 59 years of architectural advancements presented at this symposium. It remains a key venue for benchmarking new approaches against current general-purpose and AI-specialized standards.

The research presented here informs the long-term design of AI hardware found in servers and high-performance computing systems. Practitioners in chip design can expect early access to new methodologies for memory optimization and system architecture following the workshop's conclusion.

The takeaway

This workshop highlights the current academic consensus on AI hardware bottlenecks. Watch for the published proceedings from the symposium to identify new methodologies in AI semiconductor efficiency.

Further reading

For broader trends in chip design, see our coverage of Semiconductors.

Source note: This article includes information reported by The Korea Times.

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Do you believe rapid advancements in AI hardware will lead to noticeably better consumer electronics?