AI Data Centers Face Sold-Out Server CPU Capacity
AMD's Venice processors are reportedly sold out for 2027 as the Q4 2026 SP7 launch tests whether the ramp can keep pace.
Updated on Nov. 3, 2026 in Semiconductors

AMD reported its strongest early demand for EPYC Venice processors of any EPYC generation, and its 2027 Venice production capacity was reportedly fully sold out as of September 29, 2026. The Venice lineup, which AMD first announced in July 2026, is in the production-and-orders stage rather than a fully shipping product line.
Why it matters
Venice is a server CPU family aimed at hyperscale data centers and AI infrastructure, where agentic AI orchestration leans heavily on CPU capability. Strong pre-orders and sold-out capacity suggest the CPU, not just the accelerator, is becoming a bottleneck in AI data centers.
Venice is built on TSMC's 2 nm process and supports up to 256 Zen 6 cores and 512 threads, with 16-channel DDR5 memory and PCIe Gen 6. Venice SKUs are priced from about $700 to $14,904, and partners have committed to more than 240 platforms built around the processor.
The players
AMD
Advanced Micro Devices designs x86 CPUs and GPUs, and its EPYC server line competes directly with Intel's Xeon in data center processors.
Morgan Stanley
The global investment bank whose analysts publish semiconductor unit and revenue forecasts closely watched by the chip industry.
Meta
Meta has already deployed millions of earlier-generation EPYC processors and is collaborating with AMD on Venice development and validation.
TSMC
Taiwan Semiconductor Manufacturing Company is the contract foundry that fabricates AMD's chips, including Venice on its 2 nm process.
The details
Venice is AMD's EPYC 9006 series, a family of server processors that handle host duties for AI accelerators and general data center workloads. Its 2 nm manufacturing process from TSMC packs up to 256 Zen 6 cores, while 16-channel DDR5 memory and PCIe Gen 6 links move data quickly between the CPU and attached hardware. The rollout is split into two waves: SP7 models ship first in Q4 2026, and the broader SP8 lineup scales through 2027.
Timeline
July 2026: AMD first announced the Venice lineup.
September 29, 2026: AMD's 2027 Venice capacity was reportedly fully sold out.
Q4 2026: SP7 Venice models are planned to begin shipping.
2027: The broader SP8 lineup scales, and Morgan Stanley forecasts 6.75 million units to ship.
2028: AMD is reportedly taking orders for 2028 delivery.
The Tech Race
Venice places AMD against Intel's Xeon line in the high-core-count server CPU segment, where AMD's EPYC family has been gaining share. The early orders and sold-out 2027 capacity show the competition has moved to supply and production allocation as much as to raw performance.
Venice is aimed at hyperscale data centers and AI infrastructure rather than consumer devices, so direct availability for individual buyers is not addressed in the source. Organizations running large AI workloads are the ones most likely to see Venice-based servers first, starting with SP7 models in Q4 2026.
The takeaway
Watch the SP7 launch in Q4 2026 and whether the broader SP8 lineup hits its 2027 scaling targets. Those milestones will show whether AMD can convert sold-out capacity into the 6.75 million unit ramp that Morgan Stanley forecasts.
What happens next
The SP7 Venice models begin shipping in Q4 2026, the first real test of whether the planned ramp holds, and the SP8 lineup's scaling through 2027 will show whether the 6.75 million unit forecast is achievable.
Further reading
For the wider industry context behind chips like these, see the Semiconductors coverage.






