Marvell Unveiled Structera X CXL Memory Expanders
The new hardware expands memory capacity for AI inference workloads by using six-channel CXL 3.2 connectivity.
Updated on Oct. 12, 2026 in Data Centers
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Marvell Technology has announced the Structera X 3406 and 3506 memory expanders, hardware designed to facilitate shared memory pools across four host systems. These devices are research-stage components slated for initial sampling in early 2027.
Why it matters
As AI inference demands increase, managing large key-value (KV) caches has become a bottleneck for data centers. These controllers aim to solve capacity constraints by allowing systems to scale memory dynamically over high-speed links.
The new controllers provide a maximum bandwidth of 256 GB/s and support six-channel CXL 3.2, a 50% increase in channel count over the previous generation. Hardware-accelerated inline LZ4 compression enables an estimated 2 to 3 times increase in usable memory capacity.
The players
Marvell Technology
A semiconductor company focused on data infrastructure, including high-speed connectivity, CXL controllers, and storage hardware.
The details
The devices function as memory expanders that connect up to four host systems to a shared, high-capacity memory pool using PCIe 6.0 x16 links. They employ inline LZ4 compression—a lossless data compression algorithm that reduces the storage footprint—to maximize the effective capacity of the connected DDR4 or DDR5 memory banks. This architecture allows data centers to decouple memory from specific processors, providing a more flexible resource allocation for intensive AI workloads.
Timeline
Marvell launched its initial CXL product line in 2024.
Marvell unveiled the Structera X 3406 and 3506 on October 12, 2026.
Live demonstrations at the OCP Global Summit occur from October 12-15, 2026.
The devices are expected to enter the sampling phase in Q1 2027.
The Tech Race
This release positions Marvell within the competitive landscape for CXL-based memory expansion, a field critical to scaling AI inference clusters. It follows the industry's trend of transitioning toward modular, pooled memory architectures to mitigate the limitations of traditional server memory limits.
The technology is currently in a pre-sampling stage, meaning it is not yet available for commercial deployment or integration into data center workflows. Users should watch for Q1 2027, when initial sampling begins, to determine how these expanders fit into existing memory-constrained AI server stacks.
The takeaway
Marvell is pushing memory capacity limits to keep pace with AI inference KV-cache requirements. Engineers should track the Q1 2027 sampling milestone to evaluate the real-world bandwidth gains provided by the new six-channel CXL 3.2 architecture.
What happens next
Marvell will conduct live demonstrations of the Structera X hardware at the OCP Global Summit through October 15, 2026.
Further reading
Learn more about evolving infrastructure requirements in the Data Centers section.
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