Edge AI Chip Adds On-Device Inference Blocks

Mobilint's REGULUS SoC is the first production use of Ceva's NeuPro NPU family for real-time physical AI devices.

Updated on Nov. 2, 2026 in Semiconductors

Isometric editorial illustration of an unlabeled silicon die with two clusters of rectilinear processing blocks joined by conductive traces on a dark teal base.
Seoul-based Mobilint on Tuesday announced its REGULUS edge AI chip, the first production use of Ceva's NeuPro NPU family, pairing a sensor DSP with a neural processor for on-device inference. AI Illustration. Upload story photo >

Seoul-based AI semiconductor company Mobilint has deployed Ceva's SensPro AI DSP and NeuPro-Nano NPU in its REGULUS edge AI System-on-Chip, announced November 2, 2026. The deployment is the first production use of Ceva's NeuPro NPU family, so the chip is shipping in a product rather than existing only as a research design.

Why it matters

Physical AI systems that must sense, interpret and respond to their surroundings in real time need more intelligence inside power-constrained edge devices, rather than relying on cloud processing. Pairing a sensing-oriented DSP with a dedicated neural processing unit in a single edge SoC reflects that shift toward on-device inference.

The announcement establishes that the REGULUS SoC integrates two Ceva blocks, the SensPro AI DSP and the NeuPro-Nano NPU, but it does not report throughput, latency or power measurements. No benchmark figures were included, so the capability claim rests on the integration itself.

The players

Ceva, Inc.

A Rockville, Maryland licensor of DSP and NPU intellectual property whose SensPro and NeuPro families target edge AI devices.

Mobilint

A Seoul, South Korea AI semiconductor company that designs the REGULUS edge AI System-on-Chip.

The details

Mobilint has combined two Ceva components inside the REGULUS chip: the SensPro AI DSP, a digital signal processor handling sensor data, and the NeuPro-Nano NPU, a neural processing unit built to run neural network inference. A DSP is a chip optimized for mathematical processing of signals such as audio, images or radar, while an NPU is a specialized accelerator for the matrix operations that AI models perform. Together the two blocks let an edge device process raw sensor input and run AI models locally.

Timeline

  1. November 2, 2026: Mobilint's deployment of Ceva's IP in the REGULUS SoC was announced.

The Tech Race

The deal positions Ceva's NeuPro line as a licensable NPU option for edge SoC makers competing to put AI inference into devices. It moves the family from announced IP into a named customer's production silicon, a milestone competitors offering comparable edge NPU IP will be measured against.

Devices built on the REGULUS SoC could run sensing and AI inference locally rather than sending data to the cloud. No availability dates, pricing or product names for end devices were announced, so timing for consumers is unknown.

The takeaway

Watch for the first named end products built on the REGULUS chip and any published throughput or power figures for the SensPro and NeuPro-Nano combination. Those would show whether the production deployment performs at the level edge AI devices require.

Further reading

For background on the chip designs behind edge AI hardware, see the Semiconductors section.